| Course Type | Compulsory Course |
| Course Level | Bachelor's Degree |
| Year of Study | 3 |
| Semester | Sixth Term (Spring) |
| ECTS | 6 |
| Name of Lecturer(s) |
|
| Learning Outcomes |
At the end of this course, the students;
- Learn digital integrated circuits and their quality metrics.
- Learn how to change the quality metrics in digital circuit design.
- Know about CMOS circuits and learn the performance and power dissipation problems, as well as how to solve them in CMOS circuits.
- Learn the CMOS circuit design options.
|
| Mode of Delivery | Face to face |
| Prerequisites | Yes(EEE214) |
| Recommended Optional Programme Components | |
| Course Description | Digital Electronics is an introductory course to digital integrated circuits. Following topics are covered in this course: Quality metrics of a digital design, signal and noise margins on VTC, diode, MOSFET transistor, the wire, CMOS inverter, its static behavior, performance and dynamic behavior, Power in CMOS inverter, energy and delay, sizing, overview of manufacturing process, CMOS designing combinational logic Gates in CMOS, static and dynamic CMOS design, ratiod logic, pass-transistor logic, sequential logic, latch and multivibrator design. |
| Course Contents |
| WEEK |
TOPICS |
|
1st Week |
Introduction and General Description |
|
2nd Week |
Quality metrics of digital integrated circuit design, signal and noise margins on the transfer function |
|
3rd Week |
Diode, MOSFET transistor |
|
4th Week |
Diode, MOSFET transistor |
|
5th Week |
Wire |
|
6th Week |
CMOS Inverter, its static behavior, performance and dynamic behavior |
|
7th Week |
CMOS Inverter, its static behavior, performance and dynamic behavior |
|
8th Week |
Midterm Exam |
|
9th Week |
Power, energy and delay issues for CMOS Inverter, sizing |
|
10th Week |
An overview of manufacturing process |
|
11th Week |
Designing combinational logic gates in CMOS, static and dynamic CMOS design, ratioed logic, pass-transistor logic |
|
12th Week |
Designing combinational logic gates in CMOS, static and dynamic CMOS design, ratioed logic, pass-transistor logic |
|
13th Week |
Sequential Logic, latches and registers |
|
14th Week |
Sequential Logic, latches and registers |
|
| Recommended or Required Reading | Digital Integrated Circuits, Rabaey, P. Hall. |
| Planned Learning Activities and Teaching Methods |
- Lecture
- Experiment
- Presentation
- Questions/Answers
- Problem Solving
|
| Assessment Methods and Criteria |
|
Quantity |
Percentage (%) |
| Mid-term |
1 |
22 |
| Assignment |
1 |
10 |
| Quiz |
2 |
15 |
| Practice |
1 |
15 |
| Attendance |
1 |
5 |
| Total(%) |
|
67 |
| Contribution of In-term Studies to Overall Grade(%) |
|
67 |
| Contribution of Final Examination to Overall Grade(%) |
|
33 |
| Total(%) |
|
100 |
|
| ECTS Allocated Based on Student Workload |
| Activities |
Quantity |
Duration (Hour) |
Total Workload (Hour) |
| Midterm exam |
1 |
2 |
2 |
| Preparation for Quiz |
3 |
3 |
9 |
| Individual or group work |
13 |
3 |
39 |
| Preparation for Final exam |
1 |
18 |
18 |
| Course hours |
14 |
6 |
84 |
| Preparation for Midterm exam |
1 |
2 |
2 |
| Laboratory (including preparation) |
6 |
3 |
18 |
| Final exam |
1 |
2 |
2 |
| Homework |
1 |
6 |
6 |
| Total Work Load | 180 |
| Total Work Load / 30 (h) | 6 |
| ECTS Credit of the Course | 6 |
|
| Language of Instruction | English |
| Work Placement(s) | No |